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19-1086; Rev 0; 6/96
8-Pin P Supervisory Circuits with 1.5% Reset Accuracy
_______________General Description
The MAX801/MAX808 microprocessor (P) supervisory circuits monitor and control the activities of +5V Ps by providing backup-battery switchover, low-line indication, and P reset. Additional features include a watchdog for the MAX801 and CMOS RAM write protection for the MAX808. The MAX801/MAX808 offer a choice of reset-threshold voltage (denoted by suffix letter): 4.675V (L), 4.575V (N), and 4.425V (M). These devices are available in 8-pin DIP and SO packages.
____________________________Features
o Precision Voltage Monitoring, 1.5% Reset Accuracy o 200ms Power-OK/Reset Time Delay o RESET Output (MAX808) RESET and RESET Outputs (MAX801) o Watchdog Timer (MAX801) o On-Board Gating of Chip-Enable Signals (MAX808): Memory Write-Cycle Completion 3ns CE Gate Propagation Delay o 1A Standby Current o Power Switching: 250mA in VCC Mode 20mA in Battery-Backup Mode o MaxCapTM/SuperCapTM Compatible o RESET Guaranteed Valid to VCC = 1V o Low-Line Threshold 52mV Above Reset Threshold
MaxCap is a trademark of The Carborundum Corp. SuperCap is a trademark of Baknor Industries.
MAX801L/M/N, MAX808L/M/N
________________________Applications
Computers Controllers Intelligent Instruments Critical P Power Monitoring Portable/Battery-Powered Equipment Embedded Systems
______________Ordering Information
Pin Configurations appear at end of data sheet.
PART* MAX801_CPA MAX801_CSA MAX801_EPA MAX801_ESA MAX801_MJA MAX808_CPA MAX808_CSA MAX808_EPA
P POWER
TEMP. RANGE 0C to +70C 0C to +70C -40C to +85C -40C to +85C -55C to +125C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -55C to +125C
PIN-PACKAGE 8 Plastic DIP 8 SO 8 Plastic DIP 8 SO 8 CERDIP** 8 Plastic DIP 8 SO 8 Plastic DIP 8 SO 8 CERDIP**
__________Typical Operating Circuit
+5V 0.1F
0.1F
VCC
OUT
POWER FOR CMOS RAM NMI RESET
MAX808_ESA MAX808_MJA
BATT 0.1F
LOWLINE RESET
P SYSTEM MAX808
CE IN CE OUT GND FROM I/O SYSTEM OR ADDRESS DECODER TO CMOS RAM
* These parts offer a choice of reset threshold voltage. From the table below, select the suffix corresponding to the desired threshold and insert it into the blank to complete the part number. **Contact factory for availability and processing to MIL-STD-883.
RESET THRESHOLD (V) SUFFIX L N M MIN 4.60 4.50 4.35 TYP 4.675 4.575 4.425 MAX 4.75 4.65 4.50 1
________________________________________________________________ Maxim Integrated Products
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8-Pin P Supervisory Circuits with 1.5% Reset Accuracy MAX801L/M/N, MAX808L/M/N
ABSOLUTE MAXIMUM RATINGS
Input Voltage (with respect to GND) VCC .......................................................................-0.3V to +6V VBATT ....................................................................-0.3V to +6V All Other Pins........................................-0.3V to (VOUT + 0.3V) Input Current VCC Peak ..........................................................................1.0A VCC Continuous ............................................................500mA IBATT Peak.....................................................................250mA IBATT Continuous ............................................................50mA GND ................................................................................50mA All Other Inputs ...............................................................50mA Output Current OUT Peak..........................................................................1.0A OUT Continuous............................................................500mA All Other Outputs ............................................................50mA Continuous Power Dissipation (TA = +70C) Plastic DIP (derate 9.09mW/C above +70C) ............727mW SO (derate 5.88mW/C above +70C) .........................471mW CERDIP (derate 8.00mW/C above +70C) .................640mW Operating Temperature Ranges MAX801_C_A/MAX808_C_A...............................0C to +70C MAX801_E_A/MAX808_E_A ............................-40C to +85C MAX801_MJA/MAX808_MJA.........................-55C to +125C Storage Temperature Range .............................-65C to +160C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = 4.6V to 5.5V for the MAX80_L, VCC = 4.5V to 5.5V for the MAX80_N, VCC = 4.35V to 5.5V for the MAX80_M; VBATT = 2.8V; TA = TMIN to TMAX. Typical values are at VCC = 5V and TA = +25C, unless otherwise noted.) PARAMETER Operating Voltage Range VCC, BATT (Note 1) IOUT = 25mA VOUT in Normal Operating Mode VCC = 4.5V IOUT = 250mA, MAX80_C/E IOUT = 250mA, MAX80_M VCC = 3V, VBATT = 2.8V, IOUT = 100mA VCC to OUT On-Resistance VOUT in Battery-Backup Mode BATT to OUT On-Resistance Supply Current in Normal Operating Mode (excludes IOUT) Supply Current in BatteryBackup Mode (excludes IOUT) (Note 2) BATT Standby Current (Note 3) Battery-Switchover Threshold Battery-Switchover Hysteresis 2 MAX80_C/E VCC = 4.5V, IOUT = 250mA MAX80_M VCC = 3V, IOUT = 100mA VBATT = 4.5V, IOUT = 20mA VCC = 0V VBATT = 2.8V, IOUT = 10mA VBATT = 2.0V, IOUT = 5mA VBATT = 4.5V, IOUT = 20mA VCC = 0V MAX801 MAX808 TA = +25C VCC = 0V, VBATT = 2.8V TA = TMIN to TMAX VBATT = 2.8V, IOUT = 10mA VBATT = 2.0V, IOUT = 5mA VCC - 0.38 VCC - 0.45 VCC - 0.25 VCC - 0.12 1.0 1.2 VBATT - 0.16 VBATT - 0.25 VBATT - 0.12 VBATT - 0.20 VBATT - 0.08 8 12 16 68 48 0.4 MAX80_C/E MAX80_M -0.1 -1.0 VBATT + 0.05 VBATT 50 25 40 110 A 90 1 5 50 0.1 1.0 A V mV A V 1.5 1.8 2.5 SYMBOL CONDITIONS MIN 0 TYP X VCC - 0.02 VCC - 0.25 V MAX 5.5 UNITS V
VBATT + 0.2V TA = +25C VCC TA = TMIN to TMAX VBATT = 2.8V Power-up Power-down
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8-Pin P Supervisory Circuits with 1.5% Reset Accuracy
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 4.6V to 5.5V for the MAX80_L, VCC = 4.5V to 5.5V for the MAX80_N, VCC = 4.35V to 5.5V for the MAX80_M; VBATT = 2.8V; TA = TMIN to TMAX. Typical values are at VCC = 5V and TA = +25C, unless otherwise noted.) PARAMETER RESET AND LOW-LINE MAX80_L Reset Threshold Reset-Threshold Hysteresis LOWLINE to RESET Threshold Voltage LOWLINE Threshold, VCC Rising VCC to RESET Delay VCC to LOWLINE Delay RESET Active Timeout Period VLR VCC falling MAX80_L VLL tRD tLL tRP MAX80_N MAX80_M VCC falling at 1mV/s VCC falling at 1mV/s VCC rising ISINK = 50A, VCC = 1.0V, MAX80_C VBATT = 0V, VCC = 1.2V, MAX80_E/M VCC falling ISINK = 3.2mA, VCC = 4.25V ISOURCE = 0.1mA RESET Output Short-Circuit Current RESET Output Voltage (MAX801) RESET Output ShortCircuit Current (MAX801) LOWLINE Output Voltage LOWLINE Output Short-Circuit Current Watchdog Timeout Period Minimum Watchdog Input Pulse Width WDI Threshold Voltage (Note 4) WDI Input Current VIH VIL RESET deasserted, WDI = 0V RESET deasserted, WDI = VCC -50 -10 16 50 ISC ISC ISC Output sink current, VCC = 4.25V Output source current ISINK = 3.2mA ISOURCE = 5mA, VCC = 4.25V Output sink current Output source current, VCC = 4.25V ISINK = 3.2mA, VCC = 4.25V ISOURCE = 5mA, VCC = 4.25V Output sink current, VCC = 4.25V Output source current 1.12 VIL = 0.8V, VIH = 0.75V x VCC 100 0.75 x VCC 0.8 VCC - 1.5 40 20 1.6 2.24 VCC - 1.5 55 15 0.4 VCC - 1.5 0.1 VCC - 0.1 40 1.6 0.4 mA V mA V mA 140 30 VRST VCC rising and falling MAX80_N MAX80_M 4.600 4.500 4.350 4.675 4.575 4.425 13 52 4.73 4.63 4.48 17 17 200 280 0.3 0.3 0.4 V 70 4.81 4.71 4.56 s s ms V 4.750 4.650 4.500 mV mV V SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX801L/M/N, MAX808L/M/N
RESET Output Voltage
WATCHDOG TIMER (MAX801) tWD sec ns V A
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3
8-Pin P Supervisory Circuits with 1.5% Reset Accuracy MAX801L/M/N, MAX808L/M/N
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 4.6V to 5.5V for the MAX80_L, VCC = 4.5V to 5.5V for the MAX80_N, VCC = 4.35V to 5.5V for the MAX80_M; VBATT = 2.8V; TA = TMIN to TMAX. Typical values are at VCC = 5V and TA = +25C, unless otherwise noted.) PARAMETER CE IN Leakage Current CE IN to CE OUT Resistance (Note 5) CE OUT Short-Circuit Current (RESET Active) CE IN to CE OUT Propagation Delay (Note 6) CE OUT Output Voltage High (RESET Active) RESET to CE OUT Delay (Note 7) SYMBOL VCC = 4.25V Enabled mode, VCC = VRST(max) VCC = 4.25V, CE OUT = 0V VCC = 5V, CLOAD = 50pF, 50 source-impedance driver VCC = 4.25V, IOUT = 2mA VCC = 0V, IOUT = 10A VCC falling, CE IN = 0V 3.5 VBATT - 0.1 VBATT 18 CONDITIONS MIN TYP 0.00002 75 15 3 8 MAX 1 150 UNITS A mA ns V s CHIP-ENABLE GATING (MAX808)
Note 1: Either VCC or VBATT can go to 0V if the other is greater than 2V. Note 2: The supply current drawn by the MAX80_ from the battery (excluding IOUT) typically goes to 15A when (VBATT - 0.1V) < VCC < VBATT. In most applications, this is a brief period as VCC falls through this region (see Typical Operating Characteristics). Note 3: "+" = battery-discharging current, "-" = battery-charging current. Note 4: WDI is internally connected to a voltage divider between VCC and GND. If unconnected, WDI is typically driven to 1.8V, disabling the watchdog function. Note 5: The chip-enable resistance is tested with V CE IN = VCC / 2 and I CE IN = 1mA. Note 6: The chip-enable propagation delay is measured from the 50% point at CE IN to the 50% point at CE OUT. Note 7: If CE IN goes high, CE OUT goes high immediately and stays high until reset is deasserted and CE IN is low.
__________________________________________Typical Operating Characteristics
(VCC = 5V, VBATT = 2.8V, no load, TA = +25C, unless otherwise noted.)
VCC SUPPLY CURRENT vs. TEMPERATURE (NORMAL OPERATING MODE)
MAX801/808-01
BATTERY SUPPLY CURRENT vs. TEMPERATURE (BATTERY-BACKUP MODE)
MAX801/808-02
MAX808 CHIP-ENABLE PROPAGATION DELAY vs. TEMPERATURE
MAX801/808-03
75 VCC SUPPLY CURRENT (A) 70 65 60 55 50 MAX808 45 40 -55 -35 -15 5 25 45 MAX801
3.0 BATTERY SUPPLY CURRENT (A) 2.5 2.0 1.5 1.0 0.5 0
6 5 4 3 2 1 0
65 85 105 125
-60 -40 -20 0
20 40 60 80 100 120 140
PROPAGATION DELAY (ns)
-60 -40 -20 0
20 40 60 80 100 120 140
TEMPERATURE (C)
TEMPERATURE (C)
TEMPERATURE (C)
4
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8-Pin P Supervisory Circuits with 1.5% Reset Accuracy MAX801L/M/N, MAX808L/M/N
____________________________Typical Operating Characteristics (continued)
(VCC = 5V, VBATT = 2.8V, no load, TA = +25C, unless otherwise noted.)
MAX808 CHIP-ENABLE PROPAGATION DELAY vs. CE OUT LOAD CAPACITANCE
MAX801/808-04
BATT to OUT ON-RESISTANCE vs. TEMPERATURE
VBATT TO VOUT ON-RESISTANCE () VCC TO VOUT ON-RESISTANCE () VCC = 0V IOUT = 10mA 25 VBATT = 2.0V
MAX801/808-05
VCC to OUT ON-RESISTANCE vs. TEMPERATURE
1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 -60 -40 -20 0 20 40 60 80 100 120 140 IOUT = 250mA
MAX801/808-06
8 50 DRIVER PROPAGATION DELAY (ns) 6
30
1.6
20
4
15
VBATT = 2.8V
2
10 VBATT = 4.5V 5
0 0 50 CLOAD (pF) 100
-60 -40 -20 0
20 40 60 80 100 120 140
TEMPERATURE (C)
TEMPERATURE (C)
RESET THRESHOLD vs. TEMPERATURE
MAX801/808-07
RESET TIMEOUT PERIOD vs. TEMPERATURE (VCC RISING)
MAX801/808-08
LOWLINE to RESET THRESHOLD vs. TEMPERATURE (VCC FALLING)
LOWLINE TO RESET THRESHOLD (mV) 70 60 50 40 30 20 10 0 -60 -40 -20 0 20 40 60 80 100 120 140
MAX801/808-09
4.70 4.65 RESET THRESHOLD (V) 4.60 4.55 4.50 4.45 4.40 -60 -40 -20 0 MAX80_M MAX80_N
280 RESET TIMEOUT PERIOD (ms) 260 240 220 200 180 160 140 -60 -40 -20 0
80
MAX80_L
20 40 60 80 100 120 140
20 40 60 80 100 120 140
TEMPERATURE (C)
TEMPERATURE (C)
TEMPERATURE (C)
LOWLINE THRESHOLD vs. TEMPERATURE (VCC RISING)
MAX801/808-10
LOWLINE COMPARATOR PROPAGATION DELAY vs. TEMPERATURE (VCC FALLING)
MAX801/808-11
RESET COMPARATOR PROPAGATION DELAY vs. TEMPERATURE (VCC FALLING)
VCC FALLING AT 1mV/s 35 PROPAGATION DELAY (s) 30 25 20 15 10 5 0
MAX801/808-12
4.80 4.75 LOWLINE THRESHOLD (V) 4.70 4.65 4.60 4.55 4.50 4.45 4.40 -60 -40 -20 0 MAX80_M MAX80_N MAX80_L
40 VCC FALLING AT 1mV/s 35 PROPAGATION DELAY (s) 30 25 20 15 10 5 0
40
20 40 60 80 100 120 140
-60 -40 -20 0
20 40 60 80 100 120 140
-60 -40 -20 0
20 40 60 80 100 120 140
TEMPERATURE (C)
TEMPERATURE (C)
TEMPERATURE (C)
_______________________________________________________________________________________
5
8-Pin P Supervisory Circuits with 1.5% Reset Accuracy MAX801L/M/N, MAX808L/M/N
____________________________Typical Operating Characteristics (continued)
(VCC = 5V, VBATT = 2.8V, no load, TA = +25C, unless otherwise noted.)
BATTERY CURRENT vs. INPUT SUPPLY VOLTAGE
MAX801/808-13
BATT to OUT VOLTAGE vs. OUTPUT CURRENT
VCC = 0V SLOPE = 12
MAX801/808-14
16 14 BATTERY CURRENT (A) 12 10 8 6 4 2 0 2.5 2.6 2.7 2.8 2.9
1000 VBATT TO VOUT VOLTAGE (mV)
100
10 3.0 1 10 IOUT (mA) 100 VCC (V)
VCC to OUT VOLTAGE vs. OUTPUT CURRENT
MAX801/808-15
MAXIMUM TRANSIENT DURATION vs. RESET THRESHOLD OVERDRIVE
MAXIMUM TRANSIENT DURATION (s)
MAX801/808-16
1000 SLOPE = 1.0 VCC TO VOUT VOLTAGE (mV)
1000
100
100
RESET OCCURS
10
10
1 1 10 IOUT (mA) 100 1000
1 1 10 100 1000 RESET THRESHOLD OVERDRIVE (mV)
______________________________________________________________Pin Description
PIN MAX801 1 2 MAX808 1 2 NAME VCC LOWLINE FUNCTION Input Supply Voltage, nominally +5V. Bypass with a 0.1F capacitor to GND. Low-Line Comparator Output. This CMOS-logic output goes low when VCC falls to 52mV above the reset threshold. Use LOWLINE to generate an NMI, initiating an orderly shutdown routine when VCC is falling. LOWLINE swings between VCC and GND. Active-Low Reset Output. RESET is triggered and stays low when VCC is below the reset threshold (or during a watchdog timeout for the MAX801). It remains low 200ms after VCC rises above the reset threshold (or 200ms after the watchdog timeout occurs). RESET has a strong pull-down but a relatively weak pull-up, and can be wire-OR connected to logic gates. Valid for VCC 1V. RESET swings between VCC and GND. Ground
3
3
RESET
4
4
GND
6
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8-Pin P Supervisory Circuits with 1.5% Reset Accuracy
_________________________________________________Pin Description (continued)
PIN MAX801 5 -- MAX808 -- 5 NAME RESET CE OUT FUNCTION Active-High Reset Output. RESET is the inverse of RESET. It is a CMOS output that sources and sinks current. RESET swings between VCC and GND. Chip-Enable Output. Output to the chip-enable gating circuit. CE OUT is pulled up to the higher of VCC or VBATT when the chip-enable gate is disabled. Watchdog Input. If WDI remains high or low longer than the watchdog timeout period (typically 1.6sec), RESET will be asserted for 200ms. Leave unconnected to disable the watchdog function. Chip-Enable Input Backup-Battery Input. When VCC falls below the reset threshold and VBATT, OUT switches from VCC to BATT. VBATT may exceed VCC. The battery can be removed while the MAX801/MAX808 is powered up, provided BATT is bypassed with a 0.1F capacitor to GND. If no battery is used, connect BATT to ground and VCC to OUT. Output Supply Voltage to CMOS RAM. When VCC exceeds the reset threshold or VBATT, OUT connects to VCC. When VCC falls below the reset threshold and VBATT, OUT connects to BATT. Bypass OUT with a 0.1F capacitor to GND.
MAX801L/M/N, MAX808L/M/N
6 --
-- 6
WDI CE IN
7
7
BATT
8
8
OUT
VCC BATT BATTERY-BACKUP COMPARATOR
OUT
MAX801 MAX808
LOWLINE MAX801 ONLY WATCHDOG TRANSITION DETECTOR WDI
RESET COMPARATOR
LOW-LINE COMPARATOR STATE MACHINE RESET (MAX801 ONLY) RESET THE HIGHER OF VCC OR VBATT P P CE IN N CE OUT
OSCILLATOR 2.275V GND
MAX808 ONLY
Figure 1. Functional Diagram
_______________________________________________________________________________________ 7
8-Pin P Supervisory Circuits with 1.5% Reset Accuracy MAX801L/M/N, MAX808L/M/N
VRST VLL VCC VCC VRST + VLR VRST
VLOWLINE
VLOWLINE
tLL
VRESET
tRP
VRESET
tRD
VRESET (MAX801) VCE OUT (MAX808)
tRP
VRESET (MAX801)
tRD
VBATT SHOWN FOR VCC = 0V to 5V, VBATT = 2.8V, CE IN = GND
VCE OUT (MAX808)
tRCE
VBATT
SHOWN FOR VCC = 5V to 0V, VBATT = 2.8V, CE IN = GND
Figure 2a. Timing Diagram, VCC Rising
Figure 2b. Timing Diagram, VCC Falling
_______________Detailed Description
The MAX801/MAX808 microprocessor (P) supervisory circuits provide power-supply monitoring and backupbattery switchover in P systems. The MAX801 also provides program-execution watchdog functions (Figure 1). Use of BiCMOS technology results in an improved, 1.5% reset-threshold precision while keeping supply currents typically at 68A (48A for the MAX808). The MAX801/MAX808 are intended for battery-powered applications that require high resetthreshold precision, allowing a wide power-supply operating range while preventing the system from operating below its specified voltage range.
The RESET output is active low, and is implemented with a strong pull-down/relatively weak pull-up structure. It is guaranteed to be a logic low for 0V < VCC < VRST, provided VBATT is greater than 2V. Without a backup battery, RESET is guaranteed valid for VCC 1V. The RESET output is the inverse of the RESET output; it both sources and sinks current and cannot be wire-OR connected.
Low-Line Comparator
The low-line comparator monitors VCC with a threshold voltage typically 52mV above the reset threshold, with 13mV of hysteresis. Use LOWLINE to provide a nonmaskable interrupt (NMI) to the P when power begins to fall, initiating an orderly software shutdown routine. In most battery-operated portable systems, reserve energy in the battery provides ample time to complete the shutdown routine once the low-line warning is encountered and before reset asserts. If the system must contend with a more rapid VCC fall time (such as when the main battery is disconnected, when a DC-DC converter shuts down, or when a high-side switch is opened during normal operation), use capacitance on the VCC line to provide time to execute the shutdown routine (Figure 3). First calculate the worst-case time required for the system to perform its shutdown routine. Then, with worst-case shutdown time, worst-case load current, and minimum low-line to reset threshold (VLR(min)),
RESET and RESET Outputs
The MAX801/MAX808's RESET output ensures that the P powers up in a known state, and prevents codeexecution errors during power-down and brownout conditions. It does this by resetting the P, terminating program execution when V CC dips below the reset threshold. Each time RESET is asserted, it stays low for at least the 200ms reset timeout period (set by an internal timer) to ensure the P has adequate time to return to an initial state. The internal timer restarts any time VCC goes below the reset threshold (VRST) before the reset timeout period is completed. The watchdog timer on the MAX801 can also initiate a reset (see the MAX801 Watchdog Timer section).
8
_______________________________________________________________________________________
8-Pin P Supervisory Circuits with 1.5% Reset Accuracy MAX801L/M/N, MAX808L/M/N
MAX801 MAX808
4.5V to 5.5V REGULATOR VCC CHOLD LOWLINE
TO P NMI VCC
P
MAX801 MAX808
CONTROL CIRCUITRY
OUT 0.1F
CHOLD > ILOAD x tSHDN VLR
GND
BATT
P
P
Figure 3. Using LOWLINE to Provide a Power-Fail Warning to the P
Figure 4. VCC and BATT to OUT Switch
calculate the amount of capacitance required to allow the shutdown routine to complete before reset is asserted: CHOLD = (ILOAD x tSHDN) / (VLR(min)) where tSHDN is the time required for the system to complete the shutdown routine (including the VCC to lowline propagation delay), I LOAD is the current being drained from the capacitor, and VLR is the low-line to reset threshold.
Table 1. Input and Output Status in Battery-Backup Mode
PIN NAME MAX801 MAX808 1 2 3 4 5 1 2 3 4 -- VCC LOWLINE RESET GND RESET Battery switchover comparator monitors VCC for active switchover. Logic low Logic low Ground--0V reference for all signals Logic high; the open-circuit voltage is equal to VCC. Logic high. The open-circuit output voltage is equal to VBATT (MAX808). WDI is ignored and goes high impedance. High impedance (MAX808) Supply current is 1A max for VBATT 2.8V. OUT is connected to BATT through two internal PMOS switches in series. STATUS
Output Supply Voltage
The output supply (OUT) transfers power from VCC or BATT to the P, RAM, and other external circuitry. At the maximum source current of 250mA, VOUT will typically be 220mV below VCC. Decouple OUT with a 0.1F capacitor to ground.
Battery-Backup Mode
Battery-backup mode preserves the contents of RAM in the event of a brownout or power failure. With a backup battery installed at BATT, the MAX801/MAX808 automatically switches RAM to backup power when VCC falls. Two conditions are required for switchover to batterybackup mode: 1) VCC must be below the reset threshold; 2) VCC must be below VBATT. Table 1 lists the status of inputs and outputs during battery-backup mode. BATT is designed to conduct up to 20mA to OUT during battery backup. The PMOS switch on-resistance is approximately 12. Figure 4 shows the two series pass elements (between the BATT input and OUT) that facilitate UL recognition. VBATT can exceed VCC during normal operation without causing a reset.
-- 5 CE OUT
6 -- 7
-- 6 7
WDI CE IN BATT
8
8
OUT
_______________________________________________________________________________________
9
8-Pin P Supervisory Circuits with 1.5% Reset Accuracy MAX801L/M/N, MAX808L/M/N
MAX801 Watchdog Timer
The watchdog monitors the P's activity. If the P does not toggle the watchdog input (WDI) within 1.6sec, reset asserts for the reset timeout period. The internal 1.6sec timer is cleared when reset asserts or when a transition (low-to-high or high-to-low) occurs at WDI while reset is not asserted. The timer remains cleared and does not count as long as reset is asserted. It starts counting as soon as reset is released (Figure 5). Supply current is typically reduced by 10A when WDI is at a valid logic level. To disable the watchdog function, leave WDI unconnected. An internal voltage divider sets WDI to about mid-supply, disabling the watchdog timer/counter.
VCC
tRP RESET tWD
tRP
WDI
MAX808 Chip-Enable Gating
The MAX808 provides internal gating of chip-enable (CE) signals to prevent erroneous data from corrupting CMOS RAM in the event of a power failure. During normal operation, the CE gate is enabled and passes all CE transitions. When reset is asserted, this path becomes disabled, preventing erroneous data from corrupting the CMOS RAM. The MAX808 uses a series transmission gate from the chip-enable input (CE IN) to the chip-enable output (CE OUT) (Figure 1). The 8ns max chip-enable propagation from CE IN to CE OUT enables the MAX808 to be used with most Ps. The MAX808 also features write-cycle-completion circuitry. If VCC falls below the reset threshold while the P is writing to RAM, the MAX808 holds the CE gate enabled for 18s to allow the P to complete the write instruction. If the write cycle has not completed by the end of the 18s period, the CE transmission gate turns off and CE OUT goes high. If the P completes the write instruction during the 18s period, the CE gate turns off (high impedance) and CE OUT goes high as soon as the P pulls CE IN high. CE OUT remains high, even if CE IN falls low for any reason (Figure 6).
Figure 5. Watchdog Timing
VCC RESET THRESHOLD CE IN
CE OUT 18s 17s RESET 18s 17s
Figure 6. Chip-Enable Timing
Chip-Enable Input CE IN is high impedance (disabled mode) while reset is asserted. During a power-down sequence when VCC passes the reset threshold, the CE transmission gate disables. CE IN becomes high impedance 18s after reset asserts, provided CE IN is still low. If the P completes the write instruction during the 18s period, the CE gate turns off. CE IN becomes high impedance as soon as the P pulls CE IN high. CE IN remains high impedance even if the signal at CE IN falls low (Figure 6). During a power-up sequence, CE IN remains high impedance (regardless of CE IN activity) until reset is deasserted following the reset timeout period.
In high-impedance mode, the leakage currents into this input are 1A max over temperature. In low-impedance mode, the impedance of CE IN appears as a 75 resistor in series with the load at CE OUT. The propagation delay through the CE transmission gate depends on both the source impedance of the drive to CE IN and the capacitive loading on CE OUT (see the Chip-Enable Propagation Delay vs. CE OUT Load Capacitance graph in the Typical Operating Characteristics). The CE propagation delay is production tested from the 50% point on CE IN to the 50% point on CE OUT using a 50 driver and 50pF of load capacitance (Figure 7). For minimum propagation delay, minimize the capacitive load at CE OUT and use a low-output-impedance driver.
10
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8-Pin P Supervisory Circuits with 1.5% Reset Accuracy MAX801L/M/N, MAX808L/M/N
VRST(max) +5V VCC
VCC
1N4148
MAX808
CE IN 50 DRIVER GND CE OUT 50pF CLOAD 0.47F
BATT
OUT
MAX801 MAX808
GND
Figure 7. MAX808 CE Gate Test Circuit
Figure 8. Using the MAX801/MAX808 with a SuperCap
Chip-Enable Output In enabled mode, CE OUT's impedance is equivalent to 75 in series with the source driving CE IN. In disabled mode, the 75 transmission gate is off and CE OUT is actively pulled to the higher of VCC or V BATT . The source turns off when the transmission gate is enabled.
circuit as a backup source (Figure 8). Since VBATT can exceed VCC while VCC is above the reset threshold, no special precautions are needed when using these P supervisors with a SuperCap.
Backup-Battery Replacement
The backup battery can be disconnected while VCC is above the reset threshold, provided BATT is bypassed with a 0.1F capacitor to ground. No precautions are necessary to avoid spurious reset pulses.
__________Applications Information
The MAX801/MAX808 are not short-circuit protected. Shorting OUT to ground, other than power-up transients such as charging a decoupling capacitor, may destroy the device. If long leads connect to the IC's inputs, ensure that these lines are free from ringing and other conditions that would forward bias the IC's protection diodes. Bypass OUT, V CC , and BATT with 0.1F capacitors to GND. The MAX801/MAX808 operate in two distinct modes: 1) Normal Operating Mode, with all circuitry powered up. Typical supply current from VCC is 68A (48A for the MAX808), while only leakage currents flow from the battery. 2) Battery-Backup Mode, where VCC is below VBATT and VRST. The supply current from the battery is typically less than 1A.
Negative-Going VCC Transients
While issuing resets to the P during power-up, powerdown, and brownout conditions, these supervisors are relatively immune to short-duration, negative-going VCC transients (glitches). It is usually undesirable to reset the P when VCC experiences only small glitches. The Typical Operating Characteristics show a graph of Maximum Transient Duration vs. Reset Threshold Overdrive, for which reset pulses are not generated. The graph was produced using negative-going VCC pulses, starting at 5V and ending below the reset threshold by the magnitude indicated (reset comparator overdrive). The graph shows the maximum pulse width that a negative-going VCC transient may typically have without causing a reset pulse to be issued. As the amplitude of the transient increases (i.e., goes farther below the reset threshold), the maximum allowable pulse width decreases. Typically, a VCC transient that goes 40mV below the reset threshold and lasts for 3s or less will not cause a reset pulse to be issued. A 0.1F bypass capacitor mounted close to the VCC pin provides additional transient immunity.
11
Using SuperCapsTM or MaxCapsTM with the MAX801/MAX808
BATT has the same operating voltage range as VCC, and the battery-switchover threshold voltage is typically VBATT when VCC is decreasing or VBATT + 0.05V when V CC is increasing. This hysteresis allows use of a SuperCap (e.g., around 0.47F) and a simple charging
______________________________________________________________________________________
8-Pin P Supervisory Circuits with 1.5% Reset Accuracy MAX801L/M/N, MAX808L/M/N
Watchdog Software Considerations
To help the watchdog timer keep a closer watch on software execution, you can set and reset the watchdog input at different points in the program, rather than "pulsing" the watchdog input high-low-high or low-highlow. This technique avoids a "stuck" loop, where the watchdog timer continues to be reset within the loop, keeping the watchdog from timing out. Figure 9 shows a sample flow diagram where the I/O driving the watchdog input is set high at the beginning of the program, low at the beginning of every subroutine or loop, then high again when the program returns to the beginning. If the program should "hang" in any subroutine, the I/O would be continually set low and the watchdog timer would be allowed to time out, causing a reset or interrupt to be issued.
START
SET WDI LOW
SUBROUTINE OR PROGRAM LOOP, SET WDI HIGH
Maximum VCC Fall Time
The VCC fall time is limited by the propagation delay of the battery switchover comparator and should not exceed 0.03V/s. A standard rule for filter capacitance on most regulators is around 100F per Ampere of current. When the power supply is shut off or the main battery is disconnected, the associated initial VCC fall rate is just the inverse, or 1A/100F = 0.01V/s.
RETURN
END
Figure 9. Watchdog Flow Diagram
_________________Pin Configurations
TOP VIEW
VCC 1 LOWLINE 2 RESET 3 GND 4 8 OUT BATT WDI RESET
___________________Chip Information
TRANSISTOR COUNT: 922
MAX801
7 6 5
DIP/SO
VCC 1 LOWLINE 2 RESET 3 GND 4
8
OUT BATT CE IN CE OUT
MAX808
7 6 5
DIP/SO
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 (c) 1996 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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